ELEC ENG 2008 - Electronics

North Terrace Campus - Semester 1 - 2014

Devices and Basic Circuits; Diodes: ideal, characteristics, operation, analysis, small-signal model and application, reverse breakdown (Zener), rectifier; BJTs: structure, operation, npn/pnp, graphical characteristics, DC analysis, amplifiers, small-signal model, graphical analysis, biasing, single-stage amplifiers; MOSFETs: structure, operation, I-V characteristics, n- and p- enhancement types, biasing, single-stage amplifiers; Analog Circuits: BJT differential pair, small-signal analysis, non-ideal behaviour, biasing, current mirrors, differential and multi-stage amplifiers, output stages classification (A, B, AB, C) and their biasing requirements; Introduction to Digital Circuits: electronics in digital circuits, CMOS inverter : transfer characteristics, rise and fall times, capacitive loads; Introduction to electronic systems considerations.

  • General Course Information
    Course Details
    Course Code ELEC ENG 2008
    Course Electronics
    Coordinating Unit School of Electrical & Electronic Engineering
    Term Semester 1
    Level Undergraduate
    Location/s North Terrace Campus
    Units 3
    Contact Up to 4 hours per week
    Corequisites ELEC ENG 2011
    Assumed Knowledge ELEC ENG 1010
    Restrictions Available to BE(E&E-Avionics), BE(Computer Sys), BE(El &El), BE(Telecom) & associated double degree students only
    Course Description Devices and Basic Circuits; Diodes: ideal, characteristics, operation, analysis, small-signal model and application, reverse breakdown (Zener), rectifier; BJTs: structure, operation, npn/pnp, graphical characteristics, DC analysis, amplifiers, small-signal model, graphical analysis, biasing, single-stage amplifiers; MOSFETs: structure, operation, I-V characteristics, n- and p- enhancement types, biasing, single-stage amplifiers; Analog Circuits: BJT differential pair, small-signal analysis, non-ideal behaviour, biasing, current mirrors, differential and multi-stage amplifiers, output stages classification (A, B, AB, C) and their biasing requirements; Introduction to Digital Circuits: electronics in digital circuits, CMOS inverter : transfer characteristics, rise and fall times, capacitive loads; Introduction to electronic systems considerations.
    Course Staff

    Course Coordinator: Dr Said Al-Sarawi

    Course Coordinator and Lecturer: Dr Said Al-Sarawi
    Email: said.alsarawi@adelaide.edu.au
    Office: Ingkarni Wardli 3.39
    Phone: 8313 4198
    Course Timetable

    The full timetable of all activities for this course can be accessed from Course Planner.

  • Learning Outcomes
    Course Learning Outcomes
    After completion of this course, students will be able to:

    1. Describe the structure and physical operation of the diode and Zener diode
    2. Sketch the current-voltage characteristics for ideal/real diodes and Zener diodes
    3. Generate the small signal model of a diode and explain its components and operation
    4. Perform dc analysis for circuits containing a combination of resistors, capacitors and diodes
    5. Design/analyse circuits containing passive elements and diodes eg. half and full wave rectifiers, voltage regulators, peak rectifiers
    6. Analyse/describe circuits containing Zener Diodes
    7. Describe the structure and physical operation of the BJTs (NPN and PNP types) and MOSFETs (nMOS and pMOS)
    8. Sketch the various current-voltage characteristics for the BJTs and MOSFETs
    9. Explain the small signal operation of the BJTs and MOSFETs
    10. Perform dc analysis for circuits containing BJTs and MOSFETs
    11. Explain the Early effect and the concept of finite output resistance in the BJTs and MOSFETs
    12. Apply the small signal approximation to analyse BJTs and MOSFETs
    13. Compare various Biasing designs for BJT and MOSFET amplifiers
    14. Sketch/describe/compare amplifiers both 3 basic BJT and 3 basic MOSFET single-stage amplifier configurations
    15. Compare transconductance for BJTs and MOSFETs
    16. Explain the philosophy of biasing in integrated circuits (IC)
    17. Describe/sketch the CMOS device.
    18. Explain the theory behind the CMOS digital logic converter
    19. Describe why the digital CMOS logic converter is preferred for the latest IC technologies.
    20. Be able to draw the input-output voltage characteristics of a CMOS inverter.
    21. Perform simple calculations of raise and fall time using a given set of formulas
    22. Draw the structure of a differential amplifier and explain its operation that uses BJTs and MOSFETs.
    23. Explain how to steer current from one side to the other side of the differential amplifier that uses BJTs and MOSFTs
    24. Calculate the small signal gain of a differential amplifier that uses BJTs and MOSFETs
    25. Compare BJT and MOSFET -based differential amplifiers.
    26. Sketch/analyse/compare and describe the operation of various BJT and FET current mirrors
    27. Describe/sketch and compare the various output amplifier stages (Class A, Class B and Class AB).
    28. Use CAD software (Altium) to design circuits and simulate and estimate their performance
    29. Work in a group and diagnose a circuit in CAD and on a circuit board environments
    30. Measure the circuit performance and write a group report descripting simulation and circuit implementation
    31. Work in a group to design and analysis electronic circuits
    University Graduate Attributes

    This course will provide students with an opportunity to develop the Graduate Attribute(s) specified below:

    University Graduate Attribute Course Learning Outcome(s)
    Knowledge and understanding of the content and techniques of a chosen discipline at advanced levels that are internationally recognised. All
    The ability to locate, analyse, evaluate and synthesise information from a wide variety of sources in a planned and timely manner. 5,13, 21-27
    An ability to apply effective, creative and innovative solutions, both independently and cooperatively, to current and future problems. 5,6,12,13, 20-27, 29-31
    Skills of a high order in interpersonal understanding, teamwork and communication. 29-31
    A proficiency in the appropriate use of contemporary technologies. 26
    A commitment to continuous learning and the capacity to maintain intellectual curiosity throughout life. 5, 12-13, 20-23, 25-31
  • Learning Resources
    Required Resources
    Text Books

    Donald Neamen, "Microelectronics Circuit Analysis and Design," 4th Edition (McGraw-Hill Education).
    McGraw-Hill Higher Education Resources – Access to these resources is through MyUni Blackboard.

    A set of course notes, practice problems and other supporting materials will also be available for downloading from the course web site.
    Recommended Resources
    The following textbooks are suggested:

    Richard C. Jaeger and Travis N. Blalock, “Microelectronic Circuit Design,” 4th Edition (McGraw-Hill Education).
    Adel S. Sedra and Kenneth C. Smith, “Microelectronic Circuits,” 5th Edition or higher (Oxford University Press).
    Online Learning
    Extensive use will be made of the MyUni web site for this course, https://myuni.adelaide.edu.au/webapps/login.

    Course notes, tutorial problems and solutions, laboratory exercises and practice problems will all be available for downloading from the web site. Where the lecture theatre facilities permit, audio or video recordings of lectures will also be available for downloading.
  • Learning & Teaching Activities
    Learning & Teaching Modes
    This course relies on lectures as the primary delivery mechanism for the material. Tutorials supplement the lectures by providing exercises and example problems to enhance the understanding obtained through lectures. Practicals are used to provide hands-on experience for students to reinforce the theoretical concepts encountered in lectures. Continuous assessment activities provide the formative assessment opportunities for students to gauge their progress and understanding.
    Workload

    The information below is provided as a guide to assist students in engaging appropriately with the course requirements.

    Activity Contact hours Workload hours
    Lecture 24 lectures 24 48
    Tutorials 6 tutorials 6 12
    Practicals Pre Amplifier (2x3 sessions) 6 18
    Power Amplifier (3x3 sessions) 9 13.5
    In-class tests 3 Tests 3 18
    Exam 1 Exam 3 30
    TOTALS 51 139.5
    Learning Activities Summary
    Week Activity Topic
    1 Lectures 1&2 Intro and Diodes
    2 Lectures 3&4 Diodes
    Tutorial 1 Diodes
    3 Lectures 5&6 Bipolar Junction Transistors (BJT)
    4 Lectures 7&8 BJT
    Tutorial 2 BJT
    5 Lectures 9&10 Metal Oxide Semiconductor Field Effect Transistors (MOSFET)
    Test 1 Compulsory - exam conditions
    6 Lectures 11&12 MOSFET - Amplifiers
    Tutorial 3 BJT
    7 Lectures 13&14 BJT Differential Amplifiers
    Practical 1 -Session 1 Pre-amplifier
    8 Lectures 15&16 MOSFET Differential Amplifiers
    Tutorial 4 MOSFET
    Practical 1 -Session 2 Pre-amplifier
    9 Lectures 17&18 BJT and MOSFET Power Amplifier
    Test 2 Compulsory - exam conditions
    Practical 1-Session 3 Pre-amplifier
    10 Lectures 19&20 BJT and MOSFET Power Amplifier
    Tutorial 5 Power-amplifier
    Practical 2-Session 1 Power-amplifier
    11 Lectures 21&22 Integrated MOSFET - CMOS inverter
    Practical 2 -Session 2 Power-amplifier
    12 Lectures 23&24 BJT and MOSFET current mirrors and revision
    Tutorial 6 Integrated MOSFET - CMOS inverter
    Test 3 Compulsory - exam conditions
    Swot Vac Revision
    Practicals
    Note that practical classes begin in week 7 of the semester. Students must attend their allocated practical class. Further instructions on the operation of the laboratory session will be provided on MyUni. Occupational Health and Safety inductions will be conducted at these times.
    Specific Course Requirements
    Students are required to have access to Altium software. This is available at various facilities such as the CATS suite or the undergraduate computer labs of the School of Electrical & Electronic Engineering. It is the individual student’s responsibility to ensure his or her access to these facilities at appropriate times is available.
  • Assessment

    The University's policy on Assessment for Coursework Programs is based on the following four principles:

    1. Assessment must encourage and reinforce learning.
    2. Assessment must enable robust and fair judgements about student performance.
    3. Assessment practices must be fair and equitable to students and give them the opportunity to demonstrate what they have learned.
    4. Assessment must maintain academic standards.

    Assessment Summary
    Assessment activity Type Weighting Due date Learning objective addressed
    Tutorials Formative 10% (1.66% each) Weeks 2,4,6,8,10,12 All
    In-class tests Summative 15% (1.66% each) Weeks 5, 9 and 12 All
    Practicals Formative 15% ( 7.5% each) Pre-amplifier in Week 10
    Power amplifier in Week 13
    All
    Exam Summative 60% End of semester All
    Assessment Related Requirements
    The examination is a hurdle requirement. It is necessary to achieve at least 40% in the exam. If this is not achieved, the total course mark will be limited to a maximum of 49.

    A hurdle requirement is defined by the University's Assessment for Coursework Programs policy as "...an assessment task mandating a minimum level of performance as a condition of passing the course.If a student fails to meet a hurdle requirement (normally no less than 40%),and is assigned a total mark for the course in the range of 45-49, then the student is entitled to an offer of additional assessment of some type. The type of assessment is to be decided by the School     Assessment Review Committee when determining final results. The student’s final total mark will be entered at no more than 49% and the offer of an additional assessment will be specified eg. US01. Once the additional assessment has been completed, this mark will be included in the calculation of the total mark for the course and the better of the two results will apply. Note however that the maximum final result for a course in which a student has sat an additional assessment will be a “50 Pass”.

    If a student is unable to meet a hurdle requirement related to an assessment piece (may be throughout semester or at semester’s end) due to medical or compassionate circumstances beyond their control, then the student is entitled to an offer of replacement assessment of some type. An interim result of RP will be entered for the student, and the student will be notified of the offer of a replacement assessment.  Once the replacement assessment has been completed, the result of that assessment will be included in the calculation of the total mark for the course.
    Assessment Detail
    The tutorial papers require students to submit written responses to selected sets of problems. The submissions may contain any of the following: written answers, mathematical derivations, sketches, graphs and print-outs from appropriate software packages. There will be 6 separate tutorials, each will be awarded a mark on a 0-3 scale based on effort. Assessment of the tutorials will occur in the Tutorial classes.

    There are three 50 minute closed book tests in the course. The tests will require students to submit short written responses to a set of questions under examination conditions. Each test will be worth 5% to the overall assessment.

    The practical needs to be conducted during the designated laboratory sessions as listed in the Course Timetable. Students will be required to submit a written report to the practical work, which is assessed. The practical reports will be worth 15% of the overall assessment.

    The exam will be a closed book examination.
    Submission
    All written submissions to formative assessment activities are to be submitted to designated boxes within the School of Electrical & Electronic Engineering by 3:00pm on the specified dated and must be accompanied by a signed cover sheet. Copies of blank cover sheets are available from the School office in Ingkarni Wardli 3.26. No late submissions will be accepted. All formative assessments will have a two week turn-around time for provision of feedback to students.

    Full details can be found at the School policies website:
    http://eleceng.adelaide.edu.au/current-students/undergraduate/

    Course Grading

    Grades for your performance in this course will be awarded in accordance with the following scheme:

    M10 (Coursework Mark Scheme)
    Grade Mark Description
    FNS   Fail No Submission
    F 1-49 Fail
    P 50-64 Pass
    C 65-74 Credit
    D 75-84 Distinction
    HD 85-100 High Distinction
    CN   Continuing
    NFE   No Formal Examination
    RP   Result Pending

    Further details of the grades/results can be obtained from Examinations.

    Grade Descriptors are available which provide a general guide to the standard of work that is expected at each grade level. More information at Assessment for Coursework Programs.

    Final results for this course will be made available through Access Adelaide.

  • Student Feedback

    The University places a high priority on approaches to learning and teaching that enhance the student experience. Feedback is sought from students in a variety of ways including on-going engagement with staff, the use of online discussion boards and the use of Student Experience of Learning and Teaching (SELT) surveys as well as GOS surveys and Program reviews.

    SELTs are an important source of information to inform individual teaching practice, decisions about teaching duties, and course and program curriculum design. They enable the University to assess how effectively its learning environments and teaching practices facilitate student engagement and learning outcomes. Under the current SELT Policy (http://www.adelaide.edu.au/policies/101/) course SELTs are mandated and must be conducted at the conclusion of each term/semester/trimester for every course offering. Feedback on issues raised through course SELT surveys is made available to enrolled students through various resources (e.g. MyUni). In addition aggregated course SELT data is available.

    SELT feedback
    The received feedback received can be divided into two categories:

    Organisational issues:
    - Two hour lectures are too long and make it hard to follow the given concepts
    - Lectures and practicals are not synchronised, more organisation is needed
    - Better use of online resources
    - Fixed tutors in each session
    - Need more explanation from the prac demonstrators
    - More lectures, tutes and pracs

    Content Delivery:
    - More interactivity with students
    - More exercise questions
    - More experienced tutors
    - Less content of covered materials
    - More in-class exercises
    - Too much derivation from concepts
    - More in-lecture analysis examples

    School response to SELT Feedback:
    - Timetable has been adjusted to have two separate lectures a week to allow students enough time to revise and absorb covered topics.
    - The course content has been reviewed where mathematical derivation of device physical quantities are provided as a separate reading in advance and reviewed in the class.
  • Student Support
  • Policies & Guidelines
  • Fraud Awareness

    Students are reminded that in order to maintain the academic integrity of all programs and courses, the university has a zero-tolerance approach to students offering money or significant value goods or services to any staff member who is involved in their teaching or assessment. Students offering lecturers or tutors or professional staff anything more than a small token of appreciation is totally unacceptable, in any circumstances. Staff members are obliged to report all such incidents to their supervisor/manager, who will refer them for action under the university's student’s disciplinary procedures.

The University of Adelaide is committed to regular reviews of the courses and programs it offers to students. The University of Adelaide therefore reserves the right to discontinue or vary programs and courses without notice. Please read the important information contained in the disclaimer.