ELEC ENG 3028 - Digital Systems

North Terrace Campus - Semester 2 - 2015

This course develops engineering capabilities pertaining to the design of digital electronic systems. Designs for contemporary implementation technologies are expressed using circuit schematics and a hardware description language. System architecture, microarchitecture and interfacing concepts are developed through an extended case study of a commercial microprocessor. Students undertake an independent research exercise on a question related to the future of digital electronics technology.

  • General Course Information
    Course Details
    Course Code ELEC ENG 3028
    Course Digital Systems
    Coordinating Unit School of Electrical & Electronic Engineering
    Term Semester 2
    Level Undergraduate
    Location/s North Terrace Campus
    Units 3
    Contact Up to 2 hours per week
    Available for Study Abroad and Exchange Y
    Incompatible ELEC ENG 3017, ELEC ENG 3020
    Assumed Knowledge ELEC ENG 1009, ELEC ENG 1010, ELEC ENG 2008
    Course Description This course develops engineering capabilities pertaining to the design of digital electronic systems. Designs for contemporary implementation technologies are expressed using circuit schematics and a hardware description language. System architecture, microarchitecture and interfacing concepts are developed through an extended case study of a commercial microprocessor. Students undertake an independent research exercise on a question related to the future of digital electronics technology.
    Course Staff

    Course Coordinator: Dr Braden Phillips

    Course Timetable

    The full timetable of all activities for this course can be accessed from Course Planner.

  • Learning Outcomes
    Course Learning Outcomes
    On successful completion of this course students will be able to:
    1. design, build and test digital logic for systems of moderate complexity using common digital components, schematic diagrams and a hardware description language
    2. use and explain engineering practices to manage the complexity of digital systems
    3. write short assembly language programs
    4. select and justify appropriate implementation technologies for digital systems
    5. explain the operation of a single-cycle microarchitecture for a RISC microprocessor
    6. work effectively and ethically in teams to undertake the design of digital systems
    7. prepare and present a written answer to a specified research question relating to future digital technologies
    University Graduate Attributes

    This course will provide students with an opportunity to develop the Graduate Attribute(s) specified below:

    University Graduate Attribute Course Learning Outcome(s)
    Knowledge and understanding of the content and techniques of a chosen discipline at advanced levels that are internationally recognised. 1, 2, 3, 4, 5, 6, 7
    The ability to locate, analyse, evaluate and synthesise information from a wide variety of sources in a planned and timely manner. 4, 7
    An ability to apply effective, creative and innovative solutions, both independently and cooperatively, to current and future problems. 1, 2, 3, 4, 5, 6, 7
    Skills of a high order in interpersonal understanding, teamwork and communication. 2, 6, 7
    A proficiency in the appropriate use of contemporary technologies. 1, 2, 3, 4, 5, 6, 7
    A commitment to continuous learning and the capacity to maintain intellectual curiosity throughout life. 7
    A commitment to the highest standards of professional endeavour and the ability to take a leadership role in the community. 2, 6
  • Learning Resources
    Required Resources
    Textbook: David Harris and Sarah Harris, Digital Design and Computer Architecture, Elsevier. Either the First Edition (2008) or the Second Edition (2013) may be used. The full text of the First Edition of this book is available electronically from the University of Adelaide Library.

    A set of lecture slides, pre-recorded lectures, practice problems, worked solutions, and other supporting materials will be available for downloading from the course web site. An FPGA development board will be loaned to students for the duration of the course. This will be required for tutorials but may also be used in a student’s own time, in the computer aided teaching suites for example.
    Online Learning
    This course will use the MyUni web site (http://myuni.adelaide.edu.au). All announcements will be posted on MyUni and emailed to all students. Pre-recorded lectures, exercise and tutorial problems, and other resources can be downloaded from MyUni. The gradebook will be used to communicate continuous assessment grades. A discussion board will be available for course-related discussion.
  • Learning & Teaching Activities
    Learning & Teaching Modes
    The course material falls into 6 major topics. For each topic there is a series of pre-recorded lectures and small class tutorials.

    Tutorials: the course is organised around weekly small class tutorials in which students work as individuals on exercise problems and in small groups on open-ended design problems. The lecturer will be present at tutorials to answer questions and assist both groups and individuals.

    Pre-Recorded Lectures: wherever possible the lectures follow the structure, terminology and notation of the course textbook. Slides and pre-recoded lectures will be available prior to tutorials and, where material outside of the scope of the textbook is presented, detailed notes will be provided. Students will be expected to read sections of the textbook, watch the pre-recorded lectures and attempt some exercise problems in preparation for tutorials.
    Workload

    The information below is provided as a guide to assist students in engaging appropriately with the course requirements.

    Activity Contact hours Workload hours
    Pre-lecture Reading 0 34
    Pre-recorded Lectures 34 Lectures 0 34
    Tutorials 12 Tutorials 12 36
    Quiz 1 Quiz 1 6
    Research Exercise 0 4
    Practice Exercises & Revision 0 36
    TOTALS 13 150
    Learning Activities Summary
    TOPIC 0: Course Introduction (1 pre-recorded lecture, 1 tutorial)

    TOPIC 1: Building Digital Systems
     (6 pre-recorded lectures, 2 tutorials)
    Managing complexity: abstraction, discipline, hierarchy, regularity and modularity
    The digital abstraction (review): number systems, logic gates
    Implementation technologies: discrete logic chips, microprocessors, gate arrays, programmable logic controllers and custom VLSI
    Introduction to Verilog

    TOPIC 2: Combinational Logic Design (4 pre-recorded lectures, 1.5 tutorials)
    Review: Boolean equations, Boolean algebra, logic simplification, Karnaugh maps
    Logic synthesis: manual techniques, expressing combinational logic in Verilog
    High impedance & illegal logic states
    Combinational building blocks: multiplexers, decoders, tri-states, structural modelling in Verilog
    Timing: propagation delay, contamination delay, glitches

    TOPIC 3: Sequential Logic Design (8 pre-recorded lectures, 2.5 tutorials)
    Synchronous elements: latches and flip-flops
    Synchronous & asynchronous circuits and the need for synchronising elements
    Synchronous architectures: finite state machines, pipelines, datapath and control
    Synthesis of synchronous logic: manual techniques, expressing sequential logic in Verilog
    Timing: setup and hold constraints, clock skew, metastability
    Parallelism: latency & throughput, pipelines
    Advanced Verilog: finite state machines, parameterised models, test benches

    TOPIC 4: Digital Subsystems and Interfaces (6 pre-recorded lectures, 2 tutorials)
    The following subsystems are considered as a black-box, a discrete logic chip, in Verlog and as a gate-level schematic.
    Arithmetic subsystems: adders, subtractors, comparitors
    Sequential subsystems: counters, shift registers
    Memory subsystems: DRAM, SRAM, register files, ROM
    Logic array subsystems: PLAs, FPGAs
    Serial interfaces: RS232, I2C
    Parallel interfaces: address decoding, memory mapping, memory mapped I/O

    TOPIC 5: Beneath the Digital Abstraction (6 pre-recorded lectures, 2 tutorials)
    Static CMOS logic gates at the transistor schematic level
    Transistor sizing: rise and fall time, noise margin, drive
    Delay: where does delay come from in static CMOS circuits
    Power: where does power go in static CMOS circuits
    Building blocks at the transistor schematic level:
    Full adders: mirror, Manchester, PG logic
    Multiplexers, decoders, tri-states
    Latches and flip-flops

    TOPIC 6: Digital Systems Architecture (3 pre-recorded lectures, 1 tutorial)
    Assembly language: instructions, operands, machine language
    Programming: the MIPS instruction set, loops, arrays and procedure calls
    Exceptions
    Microarchitecture: a single-cycle MIPS microarchitecture

  • Assessment

    The University's policy on Assessment for Coursework Programs is based on the following four principles:

    1. Assessment must encourage and reinforce learning.
    2. Assessment must enable robust and fair judgements about student performance.
    3. Assessment practices must be fair and equitable to students and give them the opportunity to demonstrate what they have learned.
    4. Assessment must maintain academic standards.

    Assessment Summary
    Activity Type Group/Individual Weight Due Learning Outcomes 
    Tutorials 1-12 Formative Individual 15% Wks 1-12 All
    Quiz Formative Individual 10% Wk 9 1, 2, 4
    Research
    Exercise
    Formative Individual 5% Wk 11 7
    Exam Summative Individual 70% All
    Assessment Related Requirements
    The examination is a hurdle requirement. It is necessary to achieve at least 40% in the exam. If this is not achieved, the total course mark will be limited to a maximum of 49.

    A hurdle requirement is defined by the University's Assessment for Coursework Programs Policy as "...an assessment task mandating a minimum level of performance as a condition of passing the course."
    If a student fails to meet a hurdle requirement (normally no less than 40%), and is assigned a total mark for the course in the range of 45-49, then the student is entitled to an offer of additional assessment of some type. The type of assessment is to be decided by the School Assessment Review Committee when determining final results. The student’s final total mark will be entered at no more than 49% and the offer of an additional assessment will be specified eg. US01. Once the additional assessment has been completed, this mark will be included in the calculation of the total mark for the course and the better of the two results will apply. Note however that the maximum final result for a course in which a student has sat an additional assessment will be a "50 Pass".

    If a student is unable to meet a hurdle requirement related to an assessment piece (may be throughout semester or at semester’s end) due to medical or compassionate circumstances beyond their control, then the student is entitled to an offer of replacement assessment of some type. An interim result of RP will be entered for the student, and the student will be notified of the offer of a replacement assessment. Once the replacement assessment has been completed, the result of that assessment will be included in the calculation of the total mark for the course.
    Assessment Detail
    Tutorials: students will maintain an exercise book in which they will record tutorial preparation and the work completed during tutorials. This will be assessed during tutorials on the basis of the student having attempted and then corrected prescribed exercises. The best 10 marks from a student’s 12 tutorials will contribute to their final assessment.

    Quiz: the quiz will be held in week 9. It will be of 40 minutes duration and will be closed book. The quiz questions will be representative of typical exam questions.

    Research Exercise: students will write individual reports, typically 2 pages long, on an emerging digital technology. The report should draw upon research published in high-quality sources. It will be due in week 11. 

    Exam: the examination at the end of the semester will be of two hours duration and will be closed book.
    Submission
    Tutorial preparation and tutorial exercises will be marked during the tutorial sessions with verbal feedback given immediately. In Tutorial 3, for example, the exercises for Tutorial 2 and the preparation for Tutorial 3 will be marked.

    Students can expect the marks from their continuous assessment activities to be available on MyUni within two weeks of the activity.

    The report for the research exercise will be due in week 11 and will be submitted as a Turnitin Assignment on MyUni.

    In keeping with the University’s policy on Modified Arrangements for Coursework Assessment, students whose capacity to demonstrate their true level of competence in a continuous assessment task was seriously impaired because of approved medical, compassionate or extenuating circumstances will be offered the following modified arrangements.
    Course Grading

    Grades for your performance in this course will be awarded in accordance with the following scheme:

    M10 (Coursework Mark Scheme)
    Grade Mark Description
    FNS   Fail No Submission
    F 1-49 Fail
    P 50-64 Pass
    C 65-74 Credit
    D 75-84 Distinction
    HD 85-100 High Distinction
    CN   Continuing
    NFE   No Formal Examination
    RP   Result Pending

    Further details of the grades/results can be obtained from Examinations.

    Grade Descriptors are available which provide a general guide to the standard of work that is expected at each grade level. More information at Assessment for Coursework Programs.

    Final results for this course will be made available through Access Adelaide.

  • Student Feedback

    The University places a high priority on approaches to learning and teaching that enhance the student experience. Feedback is sought from students in a variety of ways including on-going engagement with staff, the use of online discussion boards and the use of Student Experience of Learning and Teaching (SELT) surveys as well as GOS surveys and Program reviews.

    SELTs are an important source of information to inform individual teaching practice, decisions about teaching duties, and course and program curriculum design. They enable the University to assess how effectively its learning environments and teaching practices facilitate student engagement and learning outcomes. Under the current SELT Policy (http://www.adelaide.edu.au/policies/101/) course SELTs are mandated and must be conducted at the conclusion of each term/semester/trimester for every course offering. Feedback on issues raised through course SELT surveys is made available to enrolled students through various resources (e.g. MyUni). In addition aggregated course SELT data is available.

  • Student Support
  • Policies & Guidelines
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