ELEC ENG 3028 - Digital Systems
North Terrace Campus - Semester 2 - 2016
General Course Information
Course Code ELEC ENG 3028 Course Digital Systems Coordinating Unit School of Electrical & Electronic Engineering Term Semester 2 Level Undergraduate Location/s North Terrace Campus Units 3 Contact Up to 2 hours per week Available for Study Abroad and Exchange Y Assumed Knowledge ELEC ENG 1009, ELEC ENG 1010, ELEC ENG 2008 Course Description This course develops engineering capabilities pertaining to the design of digital electronic systems. Designs for contemporary implementation technologies are expressed using circuit schematics and a hardware description language. System architecture, microarchitecture and interfacing concepts are developed through an extended case study of a commercial microprocessor. Students undertake an independent research exercise on a question related to the future of digital electronics technology.
Course Coordinator: Dr Braden Phillips
The full timetable of all activities for this course can be accessed from Course Planner.
Course Learning OutcomesOn successful completion of this course students will be able to:
- design, build and test digital logic for systems of moderate complexity using common digital components, schematic diagrams and a hardware description language
- use and explain engineering practices to manage the complexity of digital systems
- write short assembly language programs
- select and justify appropriate implementation technologies for digital systems
- explain the operation of a single-cycle microarchitecture for a RISC microprocessor
- work effectively and ethically in teams to undertake the design of digital systems
- prepare and present a written answer to a specified research question relating to future digital technologies
University Graduate Attributes
This course will provide students with an opportunity to develop the Graduate Attribute(s) specified below:
University Graduate Attribute Course Learning Outcome(s) Deep discipline knowledge
- informed and infused by cutting edge research, scaffolded throughout their program of studies
- acquired from personal interaction with research active educators, from year 1
- accredited or validated against national or international standards (for relevant programs)
1-7 Critical thinking and problem solving
- steeped in research methods and rigor
- based on empirical evidence and the scientific approach to knowledge development
- demonstrated through appropriate and relevant assessment
1-7 Teamwork and communication skills
- developed from, with, and via the SGDE
- honed through assessment and practice throughout the program of studies
- encouraged and valued in all aspects of learning
2,6,7 Career and leadership readiness
- technology savvy
- professional and, where relevant, fully accredited
- forward thinking and well informed
- tested and validated by work based experiences
1-7 Self-awareness and emotional intelligence
- a capacity for self-reflection and a willingness to engage in self-appraisal
- open to objective and constructive feedback from supervisors and peers
- able to negotiate difficult social situations, defuse conflict and engage positively in purposeful debate
Required ResourcesTextbook: David Harris and Sarah Harris, Digital Design and Computer Architecture, Elsevier. Either the First Edition (2008) or the Second Edition (2013) may be used. The full text of the First Edition of this book is available electronically from the University of Adelaide Library.
A set of lecture slides, pre-recorded lectures, practice problems, worked solutions, and other supporting materials will be available for downloading from the course web site. An FPGA development board will be loaned to students for the duration of the course. This will be required for tutorials but may also be used in a student’s own time, in the computer aided teaching suites for example.
Online LearningThis course will use the MyUni web site (http://myuni.adelaide.edu.au). All announcements will be posted on MyUni and emailed to all students. Pre-recorded lectures, exercise and tutorial problems, and other resources can be downloaded from MyUni. The gradebook will be used to communicate continuous assessment grades. The research exercise will be completed as a Turnitin assignment. A discussion board will be available for course-related discussion.
Learning & Teaching Activities
Learning & Teaching ModesThe course material falls into 6 major topics. For each topic there is a series of pre-recorded lectures and small class tutorials.
Tutorials: the course is organised around weekly small class tutorials in which students work as individuals on exercise problems and in small groups on open-ended design problems. The lecturer will be present at tutorials to answer questions and assist both groups and individuals.
Pre-Recorded Lectures: wherever possible the lectures follow the structure, terminology and notation of the course textbook. Slides and pre-recoded lectures will be available prior to tutorials and, where material outside of the scope of the textbook is presented, detailed notes will be provided. Students will be expected to read sections of the textbook, watch the pre-recorded lectures and attempt some exercise problems in preparation for tutorials.
The information below is provided as a guide to assist students in engaging appropriately with the course requirements.
Activity Contact hours Workload hours Pre-lecture Reading 0 34 Pre-recorded Lectures 34 Lectures 0 34 Tutorials 12 Tutorials 12 36 Quiz 1 Quiz 1 6 Research Exercise 0 4 Practice Exercises & Revision 0 36 TOTALS 13 150
Learning Activities SummaryTOPIC 0: Course Introduction (1 pre-recorded lecture, 1 tutorial)
TOPIC 1: Building Digital Systems (6 pre-recorded lectures, 2 tutorials)
Managing complexity: abstraction, discipline, hierarchy, regularity and modularity
The digital abstraction (review): number systems, logic gates
Implementation technologies: discrete logic chips, microprocessors, gate arrays, programmable logic controllers and custom VLSI
Introduction to Verilog
TOPIC 2: Combinational Logic Design (4 pre-recorded lectures, 1.5 tutorials)
Review: Boolean equations, Boolean algebra, logic simplification, Karnaugh maps
Logic synthesis: manual techniques, expressing combinational logic in Verilog
High impedance & illegal logic states
Combinational building blocks: multiplexers, decoders, tri-states, structural modelling in Verilog
Timing: propagation delay, contamination delay, glitches
TOPIC 3: Sequential Logic Design (8 pre-recorded lectures, 2.5 tutorials)
Synchronous elements: latches and flip-flops
Synchronous & asynchronous circuits and the need for synchronising elements
Synchronous architectures: finite state machines, pipelines, datapath and control
Synthesis of synchronous logic: manual techniques, expressing sequential logic in Verilog
Timing: setup and hold constraints, clock skew, metastability
Parallelism: latency & throughput, pipelines
Advanced Verilog: finite state machines, parameterised models, test benches
TOPIC 4: Digital Subsystems and Interfaces (6 pre-recorded lectures, 2 tutorials)
The following subsystems are considered as a black-box, a discrete logic chip, in Verlog and as a gate-level schematic.
Arithmetic subsystems: adders, subtractors, comparitors
Sequential subsystems: counters, shift registers
Memory subsystems: DRAM, SRAM, register files, ROM
Logic array subsystems: PLAs, FPGAs
Serial interfaces: RS232, I2C
Parallel interfaces: address decoding, memory mapping, memory mapped I/O
TOPIC 5: Beneath the Digital Abstraction (6 pre-recorded lectures, 2 tutorials)
Static CMOS logic gates at the transistor schematic level
Transistor sizing: rise and fall time, noise margin, drive
Delay: where does delay come from in static CMOS circuits
Power: where does power go in static CMOS circuits
Building blocks at the transistor schematic level:
Full adders: mirror, Manchester, PG logic
Multiplexers, decoders, tri-states
Latches and flip-flops
TOPIC 6: Digital Systems Architecture (3 pre-recorded lectures, 1 tutorial)
Assembly language: instructions, operands, machine language
Programming: the MIPS instruction set, loops, arrays and procedure calls
Microarchitecture: a single-cycle MIPS microarchitecture
The University's policy on Assessment for Coursework Programs is based on the following four principles:
- Assessment must encourage and reinforce learning.
- Assessment must enable robust and fair judgements about student performance.
- Assessment practices must be fair and equitable to students and give them the opportunity to demonstrate what they have learned.
- Assessment must maintain academic standards.
Activity Type Group/Individual Weight Due Learning Outcomes Tutorials 1-12 Formative Individual 15% Wks 1-12 All Quiz Formative Individual 10% Wk 9 1, 2, 4 Research
Formative Small Groups 5% Wk 11 7 Exam Summative Individual 70% All
Assessment Related RequirementsThe examination is a hurdle requirement. It is necessary to achieve at least 40% in the exam. If this is not achieved, the total course mark will be limited to a maximum of 49.
A hurdle requirement is defined by the University's Assessment for Coursework Programs Policy as "...an assessment task mandating a minimum level of performance as a condition of passing the course."
If a student fails to meet a hurdle requirement (normally no less than 40%), and is assigned a total mark for the course in the range of 45-49, then the student is entitled to an offer of additional assessment of some type. The type of assessment is to be decided by the School Assessment Review Committee when determining final results. The student’s final total mark will be entered at no more than 49% and the offer of an additional assessment will be specified eg. US01. Once the additional assessment has been completed, this mark will be included in the calculation of the total mark for the course and the better of the two results will apply. Note however that the maximum final result for a course in which a student has sat an additional assessment will be a "50 Pass".
If a student is unable to meet a hurdle requirement related to an assessment piece (may be throughout semester or at semester’s end) due to medical or compassionate circumstances beyond their control, then the student is entitled to an offer of replacement assessment of some type. An interim result of RP will be entered for the student, and the student will be notified of the offer of a replacement assessment. Once the replacement assessment has been completed, the result of that assessment will be included in the calculation of the total mark for the course.
Assessment DetailTutorials: students will maintain an exercise book in which they will record tutorial preparation and the work completed during tutorials. This will be assessed during tutorials on the basis of the student having attempted and then corrected prescribed exercises.
Quiz: the quiz will be held in week 9. It will be of 40 minutes duration and will be closed book. The quiz questions will be representative of typical exam questions.
Research Exercise: students will work in a small group to write a report, typically 2 pages long, on an emerging digital technology. Groups will be assigned a member of staff who will be able to advise them on their topic. The report should draw upon research published in high-quality sources. It will be due in week 11.
Exam: the examination at the end of the semester will be of two hours duration and will be closed book.
SubmissionTutorial preparation and tutorial exercises will be marked during the tutorial sessions with verbal feedback given immediately. In Tutorial 3, for example, the exercises for Tutorial 2 and the preparation for Tutorial 3 will be marked.
Students can expect the marks from their continuous assessment activities to be available on MyUni within two weeks of the activity.
The report for the research exercise will be due in week 11 and will be submitted as a Turnitin Assignment on MyUni.
In keeping with the University’s policy on Modified Arrangements for Coursework Assessment, students whose capacity to demonstrate their true level of competence in a continuous assessment task was seriously impaired because of approved medical, compassionate or extenuating circumstances will be offered the following modified arrangements.
- For tutorials: an extension of the deadline.
- For the quiz: by calculating a quiz mark according to the formula in the School’s policy on Supplementary Exercises for Continuous Assessment Components (https://www.eleceng.adelaide.edu.au/policies/continuous-assessment-exercises.pdf).
- For the research exercise: an extension of the deadline.
Grades for your performance in this course will be awarded in accordance with the following scheme:
M10 (Coursework Mark Scheme) Grade Mark Description FNS Fail No Submission F 1-49 Fail P 50-64 Pass C 65-74 Credit D 75-84 Distinction HD 85-100 High Distinction CN Continuing NFE No Formal Examination RP Result Pending
Further details of the grades/results can be obtained from Examinations.
Grade Descriptors are available which provide a general guide to the standard of work that is expected at each grade level. More information at Assessment for Coursework Programs.
Final results for this course will be made available through Access Adelaide.
The University places a high priority on approaches to learning and teaching that enhance the student experience. Feedback is sought from students in a variety of ways including on-going engagement with staff, the use of online discussion boards and the use of Student Experience of Learning and Teaching (SELT) surveys as well as GOS surveys and Program reviews.
SELTs are an important source of information to inform individual teaching practice, decisions about teaching duties, and course and program curriculum design. They enable the University to assess how effectively its learning environments and teaching practices facilitate student engagement and learning outcomes. Under the current SELT Policy (http://www.adelaide.edu.au/policies/101/) course SELTs are mandated and must be conducted at the conclusion of each term/semester/trimester for every course offering. Feedback on issues raised through course SELT surveys is made available to enrolled students through various resources (e.g. MyUni). In addition aggregated course SELT data is available.
- Academic Support with Maths
- Academic Support with writing and speaking skills
- Student Life Counselling Support - Personal counselling for issues affecting study
- International Student Support
- AUU Student Care - Advocacy, confidential counselling, welfare support and advice
- Students with a Disability - Alternative academic arrangements
- Reasonable Adjustments to Teaching & Assessment for Students with a Disability Policy
Policies & Guidelines
This section contains links to relevant assessment-related policies and guidelines - all university policies.
- Academic Credit Arrangement Policy
- Academic Honesty Policy
- Academic Progress by Coursework Students Policy
- Assessment for Coursework Programs
- Copyright Compliance Policy
- Coursework Academic Programs Policy
- Elder Conservatorium of Music Noise Management Plan
- Intellectual Property Policy
- IT Acceptable Use and Security Policy
- Modified Arrangements for Coursework Assessment
- Student Experience of Learning and Teaching Policy
- Student Grievance Resolution Process
Students are reminded that in order to maintain the academic integrity of all programs and courses, the university has a zero-tolerance approach to students offering money or significant value goods or services to any staff member who is involved in their teaching or assessment. Students offering lecturers or tutors or professional staff anything more than a small token of appreciation is totally unacceptable, in any circumstances. Staff members are obliged to report all such incidents to their supervisor/manager, who will refer them for action under the university's student’s disciplinary procedures.
The University of Adelaide is committed to regular reviews of the courses and programs it offers to students. The University of Adelaide therefore reserves the right to discontinue or vary programs and courses without notice. Please read the important information contained in the disclaimer.